Day 3: 16th September 2016
The third session started with a discussion on Combinational Modules of Adders and Latch-Based Shift Register. Dr. Chandrachoodan said Modern VLSI favors adder designs which have compact carry chains and adder delay is dominated by carry chain. He explained how various adder architectures differ from each other in carry generation circuit like Ripple Carry Adder, Carry-Look Ahead Adder, Carry-Select Adder, Carry Skip Adder, Manchester Carry Chain and Serial Adder. |